Almost all integrated circuits (ICs), and, in particular, flash memory ICs, have an internal Power-On-Reset circuit (POR) to reset all circuits before the IC begins to operate. Traditional POR circuits can malfunction, however, and cause incorrect operation of the integrated circuit, if the reset operation is allowed to take place before voltage and current sources and signals of the integrated circuit have reached their nominal levels. In particular, internal power supplies generated by charge pumps need time to set their output voltages to the correct level. In addition, in the case of flash memories used in cellular phones and in other applications requiring very low power consumption, the POR must operate at values of Vcc as low as 1.65 V, and POR power consumption must be eliminated or at least minimized once the reset operation is completed. Moreover, the POR circuit must be robust enough to work properly regardless of the slope of the Vcc ramp.
For the reasons stated above and for additional reasons stated hereinafter, which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a conditioned and robust ultra-low power power-on reset circuit for very low voltage flash memory.